MAVILERA SAP-1 Laboratory: documentation

Interactive Microprocessor Architecture Laboratory: Visualize. Execute. Understand.

About SAP-1

SAP-1 is the first of the simple-as-possible (SAP) computers, teaching designs by Albert Paul Malvino in his textbook Digital Computer Electronics (McGraw-Hill, first edition 1977; third edition with Jerald A. Brown, Glencoe/McGraw-Hill, 1993). The book presents SAP-1, SAP-2 and SAP-3 in turn as computers a student can build from digital components; its preface describes their instruction set as a subset of the Intel 8085's. SAP-1 is a textbook design, not a commercial product.

SAP-1 has five instructions (LDA, ADD, SUB, OUT and HLT), sixteen bytes of memory, an accumulator, a B register, an adder-subtracter and an output register on one 8-bit bus, the W bus. A controller-sequencer steps every instruction through six timing states.

Why it matters: SAP-1 shows the whole of a stored-program computer, fetch and execute, bus transfers and the control word, in parts few enough to follow one clock at a time. It prepares for the larger SAP-2 and for real 8-bit microprocessors.

Where it is seen today: Ben Eater has said that the programmable 8-bit computer he built on breadboards follows, roughly, the SAP-1 architecture of this book.

The detailed description of SAP-1 is chapter 10 of the book. The book has no DOI.

• Digital Computer Electronics, third edition A. P. Malvino, J. A. Brown. Glencoe/McGraw-Hill, 1993. ISBN 0-02-800594-5. Chapter 10: SAP-1.
• The Amp Hour #444: An Interview with Ben Eater 27 May 2019.
• Ben Eater: 8-bit computer

Getting started

1. Open the application. The editor holds a short example program; Templates in the toolbar offers others, each showing one idea, with a note at the top on what to try.
2. Press Assemble (Ctrl+Enter). The listing shows each byte with its address in hexadecimal and binary; errors are underlined in the editor and explained in the console.
3. Press Step (F10) a few times. The current instruction is marked in the editor and the listing, and the registers A, B, OUT and PC change.
4. Press Step back (Shift+F10) to undo a step, or Run (F5) to run to HLT or to a breakpoint.
5. Choose Bus at the top. The same program now runs one timing state per step on the drawing of the computer.

The example program of a new session:

        LDA first     ; A <- M[first]
        ADD second    ; A <- A + M[second]
        SUB third     ; A <- A - M[third]
        OUT           ; OUT <- A
        HLT           ; stop the clock

        ORG 0DH       ; the data at the end of the memory
first:  DB 28
second: DB 17
third:  DB 5

The workspace

The page is a workspace of panes, as in a code editor.

• Header: the views (Instructions, Bus); the View menu (show or hide panes, reset the layout); the theme; projector mode; full screen; the keyboard summary; Help.
• Toolbar: Assemble, Run/Pause, Step back, Step, Run to cursor, Reset, the speed, Templates and the File menu. Each control has a tooltip with its name and key. Step over and Step out are shown disabled, with the reason: SAP-1 has no jumps or calls.
• Editor: SAP-1 assembly, with completion of mnemonics, help when you point at a word, find, and breakpoints in the line numbers.
• Listing: each byte with its address, in hexadecimal and binary; the tabs Data and Symbols show the data bytes and the labels.
• Instruction inspector: the fields of the selected byte (op code and address), and a scratch line that turns one instruction into its byte or a byte into its instruction without changing the program.
• Registers and counters: A, B, OUT and PC; the counter of instructions run.
• Memory and console: the sixteen bytes of memory, and the console, where each OUT writes a line and the assembler writes its messages.

Drag a divider to resize panes; the sizes are kept in this browser for each view.

Assembly language

One instruction or directive per line, with an optional label (ending in :) and an optional comment (starting with ;). Mnemonics are not case-sensitive.

What each instruction does is shown when you point at it in the editor; the full description of the computer is in the book listed under About SAP-1.

Running and debugging

• Breakpoints: click a line number in the editor or an address in the listing (B on a row).
• Watchpoints: tick a register's eye to stop when it is written; double-click a memory byte, or use Watch, to stop when that byte is written.
• Step back undoes one step at a time, back to the start of the run.
• Run to cursor (Ctrl+F10) stops at the editor's line.
• A run that does not halt stops after a large number of instructions, with a message in the console.

The Bus view

The drawing shows the W bus and the units on it: program counter, MAR, memory, instruction register, controller-sequencer, accumulator A, adder-subtracter, register B, output register and its binary display, and the clock. Each step is one clock, one timing state.

• The unit that drives the bus, the registers that load from it and the asserted control lines are highlighted. The status line names the timing state, its phase and the instruction.
• Step instruction and Back instruction go to the first timing state of the next instruction, or of this one.
• Select a control signal, in the controller or on its wire, to trace it and read what it does in the present state. Enter on a drawn element opens its details.
• The tabs under the drawing: Control word (the twelve lines of CON, their levels and what each does), Sequence (the timing states of the instruction and their transfers), Waveforms (chosen signals over the clocks run so far; select a clock to go to it), the listing and the memory.

Exercises

File ▸ Exercise… lists practice exercises written for MAVILERA, each with a task and a starter program. Run the tests runs your program from its start with each test's bytes in memory and shows expected against actual. No solutions are included. A teacher's exercise file (JSON, with "arch": "sap-1") opens with File ▸ Open.

Files, sharing and exports

• Your work is kept in this browser: after a refresh or a closed tab, the program, its file name, the cursor, breakpoints, watchpoints and the step you had reached come back.
• File ▸ Copy share link puts the program, the view and its settings into a link. They travel in the part after #, which the browser never sends to a server.
• File ▸ Save program and settings… writes a .json file; File ▸ Open reads it back, and also .asm files.
• File ▸ Data in and out… loads bytes into memory before a run, and saves a memory range.

The run exports replay the program from reset to its halt; the session you are in is not changed.

Offline use and privacy

• After a first visit, the hosted application opens without a network connection.
• The single-file version, offered on the home page, is one .html file that opens from the local disk and makes no network request.
• No account, no tracking, no upload: programs, data files and exports never leave the browser.

Keyboard reference

Limits of the model

• The Bus view is a teaching model of the computer's bus and controller. A simulation shows what the model does; it is not evidence of how a hardware build behaves.
• Timing states are counted, not timed: there are no gate delays and no clock frequency.

Licence and notices

© 2026 Sajid Muhaimin Choudhury. MAVILERA and its content (drawings, help texts, this documentation, example programs and exercises) are licensed under the Apache License, Version 2.0. The names and the logo are not licensed as trademarks.

SAP-1 is described in Digital Computer Electronics by Albert Paul Malvino and Jerald A. Brown, © 1977, 1983 McGraw-Hill, Inc. and © 1983, 1993 Glencoe/McGraw-Hill. MAVILERA reproduces no text or figure of the book; its simulator, drawings, help and programs are its own. It is not affiliated with or endorsed by the authors, the publisher or Ben Eater. Intel is a trademark of Intel Corporation or its subsidiaries.