Curriculum & Laboratory Development

EEE 416 — Microprocessors, Microcontrollers and Embedded Systems

The syllabus for EEE 416 was changed and the course redesigned from the ground up for the January 2022 offering. The revised syllabus, as approved in 2022, moved the course towards processor architecture and microarchitecture, instruction set architecture, pipelining and hazards, memory hierarchy and cache, multicore computing, and a simple ARM/RISC-V processor implemented in Verilog HDL — paired with a second strand on embedded systems design covering ARM Cortex-M and RISC-V microcontroller architecture, assembly programming, interrupts and timing analysis, and serial protocols.

A laboratory development proposal accompanying the redesign was under consideration with the University authority at that time, anticipating a move to FPGA-based microprocessor design and ARM/RISC-V microcontroller-based embedded systems design. Because procurement is a slow process, the redesigned course was initially delivered using existing laboratory infrastructure.

The course has since been offered in January 2022, January 2023, July 2023 and January 2025.

Teaching material developed along the same lines is published as a workshop handout on computer architecture, ARM assembly and Verilog.

This page records only work that is documented elsewhere on this site. It is expected to grow as further curriculum and laboratory development is written up.