Archive | SAJID Lab

EEE 303 (Jul 2025)

Sun, 01 Jun 2025 00:00:00 +0000

Course announcements: For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Course Outcomes

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits	PO(a)	C4	Lectures, Homework	Class test, Final exam
CO2	identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits using Verilog, FPGA and PCB design tools	PO(e)	C2	Lectures, Homework	Class test, Final exam
CO3	design combinational and sequential logic circuits with practical constraints using Verilog	PO(c)	C6	Lectures, Tutorials, Homework	Assignment Class test, Final exam

CO No.

CO Statement

Corresponding PO(s)*

Domains and Taxonomy level(s)**

Delivery Method(s) and Activity(-ies)

Assessment Tool(s)

CO1

Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits

PO(a)

Lectures, Homework

Class test, Final exam

CO2

identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits using Verilog, FPGA and PCB design tools

PO(e)

Lectures, Homework

Class test, Final exam

CO3

design combinational and sequential logic circuits with practical constraints using Verilog

PO(c)

Lectures, Tutorials, Homework

Assignment

Class test, Final exam

Textbooks

[Harris] Digital Design and Computer Architecture ARM Edition
[Brown] Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design” 3rd Edition, McGraw Hill (2014)
[Floyd] Thomas L. Floyd, “Digital Fundamentals” 11th Edition, Pearson (2015)
[Mano] Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL” 5th Edition, Pearson (2013)
[Malvino] Albert P. Malvino, Jerald A. Brown - Digital Computer Electronics-McGraw-Hill (1993)

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 303 (Jul 2026)

Sun, 01 Jun 2025 00:00:00 +0000

Course announcements: For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Course Outcomes

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits	PO(a)	C4	Lectures, Homework	Class test, Final exam
CO2	identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits using Verilog, FPGA and PCB design tools	PO(e)	C2	Lectures, Homework	Class test, Final exam
CO3	design combinational and sequential logic circuits with practical constraints using Verilog	PO(c)	C6	Lectures, Tutorials, Homework	Assignment Class test, Final exam

CO No.

CO Statement

Corresponding PO(s)*

Domains and Taxonomy level(s)**

Delivery Method(s) and Activity(-ies)

Assessment Tool(s)

CO1

Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits

PO(a)

Lectures, Homework

Class test, Final exam

CO2

identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits using Verilog, FPGA and PCB design tools

PO(e)

Lectures, Homework

Class test, Final exam

CO3

design combinational and sequential logic circuits with practical constraints using Verilog

PO(c)

Lectures, Tutorials, Homework

Assignment

Class test, Final exam

Textbooks

[Harris] Digital Design and Computer Architecture ARM Edition
[Brown] Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design” 3rd Edition, McGraw Hill (2014)
[Floyd] Thomas L. Floyd, “Digital Fundamentals” 11th Edition, Pearson (2015)
[Mano] Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL” 5th Edition, Pearson (2013)
[Malvino] Albert P. Malvino, Jerald A. Brown - Digital Computer Electronics-McGraw-Hill (1993)

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 304 (Jul 2025)

Sun, 01 Jun 2025 00:00:00 +0000

Course announcements: For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.

Course Outline

Delivery - Topic

Week 01 - Lecture on Introduction to overview of the experiments and projects, Lab Policies, Grading; formation of Teams for design project and lab works
Week 02 - Experiment 01 Introduction To Basic Gates and Logic Simplification Techniques with discrete logic and Schematic Capture
Week 03 - Experiment 02 Design, Simulation, and Implementation of Arithmetic Circuits using 74 series ICs and VerilogHDL
Week 04 - Project Proposal Presentation Describe specific technical requirements to be attained during the project
Week 05 - Experiment 03 Design, Simulation, and Implementation of Combinational Circuits: Decoder/Encoder/Multiplexer Circuit using 74 series ICs and Verilog HDL
Week 06 - Experiment 04 Design, Simulation, and Test of Sequential Circuits Using Verilog and Implementation In FPGA
Week 07 - Project Design Presentation Present/demonstrate the technical progress of the project. Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project
Week 08 - Experiment 05 Design, Simulation and Test of Finite State Machines Using Verilog And Implementation In FPGA.
Week 09 - Experiment 06 Design, Simulation and Test of an SAP computer Using Verilog And Implementation In FPGA.
Week 10 - Project Progress Presentation Present/demonstrate the technical progress of the project. Describe any necessary modification proposed to address public health and safety, cultural, societal, and environmental considerations related to the project
Week 11 - Lab Test Lab Test performed on Experiment 1-6
Week 12 - Peer Assessment and Viva - Present/demonstrate the technical progress, team and individual contribution and ethical principles applied to the design and implementation of the project, Answer Technical Questions related to the project Individually and ethical principles applied to the design and implementation of the project
Week 13 - Project Demonstration - Use multimedia and necessary documentation user manual, video demonstration and project report to clearly communicate the project

Course Outcome

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Build digital electronic circuits using 74 series gates in breadboards	PO(a)	P3	Labwork Labtest	Lab Performance Lab Report Lab Test Quiz
CO2	Construct Verilog programs and logic circuits for solving problems related to digital electronics, understanding the practical limitations	PO(e)	P5	Labwork Labtest	Lab Performance Lab Report Lab Test Quiz Project Report
CO3	design a digital system to solve a relevant problem with due considerations to public health and safety, societal, cultural and environmental consideration	PO(c)	P7	--	Project Demonstration, Project Report
CO4	demonstrate application of ethical principles and practices in the project, and evaluate peer team members ethically	PO(h)	A3	--	Peer evaluation, Report
CO5	work effectively as an individual and as a team member towards the successful completion of the project	PO(i)	P4	--	Viva, Peer evaluation
CO6	report effectively on the design done for CO3 with presentation, user-manual and detailed report	PO(j)	A3	--	Video Presentation Project Report

EEE 304 (Jul 2026)

Sun, 01 Jun 2025 00:00:00 +0000

Course announcements: For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.

Course Outline

Delivery - Topic

Week 01 - Lecture on Introduction to overview of the experiments and projects, Lab Policies, Grading; formation of Teams for design project and lab works
Week 02 - Experiment 01 Introduction To Basic Gates and Logic Simplification Techniques with discrete logic and Schematic Capture
Week 03 - Experiment 02 Design, Simulation, and Implementation of Arithmetic Circuits using 74 series ICs and VerilogHDL
Week 04 - Project Proposal Presentation Describe specific technical requirements to be attained during the project
Week 05 - Experiment 03 Design, Simulation, and Implementation of Combinational Circuits: Decoder/Encoder/Multiplexer Circuit using 74 series ICs and Verilog HDL
Week 06 - Experiment 04 Design, Simulation, and Test of Sequential Circuits Using Verilog and Implementation In FPGA
Week 07 - Project Design Presentation Present/demonstrate the technical progress of the project. Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project
Week 08 - Experiment 05 Design, Simulation and Test of Finite State Machines Using Verilog And Implementation In FPGA.
Week 09 - Experiment 06 Design, Simulation and Test of an SAP computer Using Verilog And Implementation In FPGA.
Week 10 - Project Progress Presentation Present/demonstrate the technical progress of the project. Describe any necessary modification proposed to address public health and safety, cultural, societal, and environmental considerations related to the project
Week 11 - Lab Test Lab Test performed on Experiment 1-6
Week 12 - Peer Assessment and Viva - Present/demonstrate the technical progress, team and individual contribution and ethical principles applied to the design and implementation of the project, Answer Technical Questions related to the project Individually and ethical principles applied to the design and implementation of the project
Week 13 - Project Demonstration - Use multimedia and necessary documentation user manual, video demonstration and project report to clearly communicate the project

Course Outcome

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Build digital electronic circuits using 74 series gates in breadboards	PO(a)	P3	Labwork Labtest	Lab Performance Lab Report Lab Test Quiz
CO2	Construct Verilog programs and logic circuits for solving problems related to digital electronics, understanding the practical limitations	PO(e)	P5	Labwork Labtest	Lab Performance Lab Report Lab Test Quiz Project Report
CO3	design a digital system to solve a relevant problem with due considerations to public health and safety, societal, cultural and environmental consideration	PO(c)	P7	--	Project Demonstration, Project Report
CO4	demonstrate application of ethical principles and practices in the project, and evaluate peer team members ethically	PO(h)	A3	--	Peer evaluation, Report
CO5	work effectively as an individual and as a team member towards the successful completion of the project	PO(i)	P4	--	Viva, Peer evaluation
CO6	report effectively on the design done for CO3 with presentation, user-manual and detailed report	PO(j)	A3	--	Video Presentation Project Report

EEE 6516 - (April 2025)

Tue, 01 Apr 2025 00:00:00 +0000

This webpage will not be updated, and kept just for prospective students to have an idea about the course.
We have created a class Teams for this course, if you have not been added to the class Team, please email the course instructor.

Incomplete Grade Policy

In this course, you will be given an I grade, ONLY if you complete all assignments and Final Presentation, and just fail to appear in the final exam due to reasons beyond your control. You must apply to Head of the Department of EEE within 1 week of commencement of the final exam. Failure to participate either the assignments or final-presentation would not be considered for I grade, and your grading would be done through the Grading criteria. Kindly consider the policy, and withdraw from the course if you are unsure if you would continue.

Class Schedule

Tuesday 2pm-5pm Room EEE 625, ECE Building, BUET

Syllabus

Course Content

Introduction to quantum computing; Postulates of quantum mechanics; Qubits and single-qubit gates; Operators and quantum measurement; Quantum information processing, superposition, entanglement, no cloning theorem, and quantum teleportation; Quantum circuits, controlled operation and measurement, universal quantum gates; Quantum algorithms: Deutsch-Jozsa algorithm, Grover’s algorithm, Shor’s algorithm, quantum Fourier transform and phase estimation; Density matrices and Bloch sphere representation of quantum variables; Quantum error correction and fault-tolerant architecture; Physical realization of quantum computers: harmonic oscillator, optical quantum computers, trapped ions, superconducting qubits, and new implementation schemes.

Course Outcomes (CO)

After completion of this course, students will be able to

CO No.	CO Statement	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Understand fundamental notations and problems of quantum computing quantum algorithms and structures.	C2 : Cognitive /Understand	Lectures, Handouts, Code Book	Assignment 1 Final Examination
CO2	Assess the efficiency and limitations of quantum algorithms, and different quantum hardware and technologies	C5: Cognitive /Evaluate	Lectures, Handouts, Code Book	Assignment 2 Final Examination
CO3	Demonstrate proficiency in implementing quantum algorithms and quantum circuits with multiple qubits for solving practical problems	P4: Psychomotor /Mechanism	Class Demonstrations Code Book	Final Presentation, Report

Assessment Policy

Continuous Assessment: Continuous assessment any of the activities such as assignment, presentation, programming assignment etc.
One Video / live presentation will be prepared by individual students.
Final Examination: A comprehensive term final examination will be held at the end of the Term. Class lectures, Case studies, Research papers review, Practical problem solution etc.

Grading Policy

Class Test (15%)
Midterm (25%)
Final Project (30%)
4.Term Final (30%)

Textbooks / Resources

C. Albornoz, G. Alonso, M. Andrenkov, P. Angara, A. Asadi, A. Ballon, S. Bapat, L. Botelho, I. De Vlugt, O. Di Matteo, P. Downing, P. Finlay, A. Fumagalli, A. Gardhouse, N. Girard, A. Hayes, J. Izaac, R. Janik, T. Kalajdzievski, N. Killoran, I. Kurečić, O. Landon-Cardinal, D. Nino, A. Otto, C. Pere, J. Pickering, J. Soni, D. Wakeham. (2023) Xanadu Quantum Codebook. ( )
Alessio Serafini, Quantum Continuous Variables A Primer of Theoretical Methods, 2nd Edition CRC Press (2023)
Nielsen, Michael A., and Isaac L. Chuang. Quantum Computation and Quantum Information Cambridge, UK: Cambridge University Press) (2010)

Collected Resources

This part of the website, I collect different resources and links

Lectures

Books

in ArXiv

EEE 6002 - (April 2024)

Sat, 01 Jun 2024 00:00:00 +0000

Class Schedule

Wednesday 2pm-5pm Room EEE 625, ECE Building, BUET

Syllabus

Course Content

Introduction to quantum computing, circuits and single-qubit gates, Qubits, bra-ket notation, superposition, and measurements, Rotation gates, the Bloch sphere and quantum state preparation, Measurements and expectation values; Introduction to multi-qubit circuits and entanglement, Quantum Algorithms - No cloning theorem and quantum teleportation, Deutsch-Jozsa algorithm, Grover’s algorithm, Quantum Fourier Transform (QFT), Shor’s algorithm, quantum error correction. Quantum Algorithms simulation. Introduction to quantum hardware - fault-tolerant architecture, Photonic quantum computers, Trapped ions, Superconducting qubits, Neutral-atom quantum computers, Pulse programming on Rydberg atom hardware, Introduction to quantum photonics and continuous variable Quantum Computing, Annihilation and creation, quadrature and number operators, Continuous-variable (CV) quantum circuits, Quantum photonics for information processing.

Course Outcomes (CO)

After completion of this course, students will be able to

CO No.	CO Statement	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Understand fundamental notations and problems of quantum computing quantum algorithms and structures.	C2 : Cognitive /Understand	Lectures, Handouts, Code Book	Assignment 1 Final Examination
CO2	Assess the efficiency and limitations of quantum algorithms, and different quantum hardware and technologies	C5: Cognitive /Evaluate	Lectures, Handouts, Code Book	Assignment 2 Final Examination
CO3	Demonstrate proficiency in implementing quantum algorithms and quantum circuits with multiple qubits for solving practical problems	P4: Psychomotor /Mechanism	Class Demonstrations Code Book	Final Presentation, Report

Assessment Policy

Continuous Assessment: Continuous assessment any of the activities such as assignment, presentation, programming assignment etc.
One Video / live presentation will be prepared by individual students.
Final Examination: A comprehensive term final examination will be held at the end of the Term. Class lectures, Case studies, Research papers review, Practical problem solution etc.

Grading Policy

Assignment 1 15%
Assignment 2 15%
Final Presentation+Report 30%
Final Examination 40%
Total 100%

Textbooks / Resources

C. Albornoz, G. Alonso, M. Andrenkov, P. Angara, A. Asadi, A. Ballon, S. Bapat, L. Botelho, I. De Vlugt, O. Di Matteo, P. Downing, P. Finlay, A. Fumagalli, A. Gardhouse, N. Girard, A. Hayes, J. Izaac, R. Janik, T. Kalajdzievski, N. Killoran, I. Kurečić, O. Landon-Cardinal, D. Nino, A. Otto, C. Pere, J. Pickering, J. Soni, D. Wakeham. (2023) Xanadu Quantum Codebook. ( )
Alessio Serafini, Quantum Continuous Variables A Primer of Theoretical Methods, 2nd Edition CRC Press (2023)
Nielsen, Michael A., and Isaac L. Chuang. Quantum Computation and Quantum Information Cambridge, UK: Cambridge University Press) (2010)

Collected Resources

This part of the website, I collect different resources and links

Lectures

Books

in ArXiv

EEE 303 (Jan 2024)

Mon, 01 Jan 2024 00:00:00 +0000

EEE 303 - Digital Electronics

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

EEE 303 - Digital Electronics

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Course Outcomes

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits	PO1	C4	Lectures, Homework	Class test, Final exam
CO2	identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits	PO5	C2	Lectures, Homework	Class test, Final exam
CO3	design combinational and sequential logic circuits with practical constraints using Verilog	PO3	C6	Lectures, Tutorials, Homework	Assignment Class test, Final exam

Course Outline

Week	Topic
1	Introduction to Number Systems and codes. Introduction to Boolean algebra, Introduction to VerilogHDL	Harris 1.4, 5.3, 1.5
2-3	Analysis and synthesis of digital logic circuits: Basic logic function, combinational logic design, Universal logic gates, Minimization of combinational logic, k-map	Harris 2.1-2.9
4	Programming and structural and behavioral design of digital systems using VerilogHDL, Verilog Timing analysis and test bench. Verilog synthesis with combinational logic	Harris 4
5	ALU design (Adder, Subtractor, Comparator)	Harris 5.2- Floyd 6.1-6.3
6	Decoder, encoder, Multiplexer, demultiplexer	Floyd 6.4-6.9
7	MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic circuits, transmission gates, Modular combinational circuit design: pass transistor, pass gates, and their implementation in CMOS	Harris 1.7-1.8
	MIDTERM
8	Sequential circuits: different types of latches, flip-flops	Harris 3.1-3.2 Floyd 7.1-7.3
9	Modular sequential logic circuit design: shift registers, counters, and application	Floyd 8.1-8.3, 9.2-9.7
10-11	Asynchronous and synchronous sequential circuits., Introducing State Machine Design, State Minimization, Mille and Moore type state machine, design of simple FSM using Verilog	Harris 3.4
12-13	Design of a Simple-As-Possible (SAP) computer: SAP-1, selected concepts from SAP-2 (jump, call, return)	Malvino Ch10,11 (partially)
13	Dual Inline Packaged and Surface Mount Device (SMD) Integrated Circuits, Introduction to System Integration and Printed Circuit Board design, Memories: classification and architecture, RAM memory cells, Read only memory	Lecture Slides Harris 5.5

Textbooks

[Harris] Digital Design and Computer Architecture ARM Edition
[Brown] Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design” 3rd Edition, McGraw Hill (2014)
[Floyd] Thomas L. Floyd, “Digital Fundamentals” 11th Edition, Pearson (2015)
[Mano] Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL” 5th Edition, Pearson (2013)
[Malvino] Albert P. Malvino, Jerald A. Brown - Digital Computer Electronics-McGraw-Hill (1993)

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 304 (Jan 2024)

Mon, 01 Jan 2024 00:00:00 +0000

EEE 304 - Digital Electronics Laboratory

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

Course Outline

Delivery Topic

Week 01 - Lecture on Introduction to overview of the experiments and projects, Lab Policies, Grading; formation of Teams for design project and lab works
Week 02 - Experiment 01 Introduction To Basic Gates and Logic Simplification Techniques with discrete logic and Schematic Capture
Week 03 - Experiment 02 Design, Simulation, and Implementation of Arithmetic Circuits using 74 series ICs and VerilogHDL
Week 04 - Project Proposal Presentation Describe specific technical requirements to be attained during the project
Week 05 - Experiment 03 Design, Simulation, and Implementation of Combinational Circuits: Decoder/Encoder/Multiplexer Circuit using 74 series ICs and Verilog HDL
Week 06 - Experiment 04 Design, Simulation, and Test of Sequential Circuits Using Verilog and Implementation In FPGA
Week 07 - Project Design Presentation Present/demonstrate the technical progress of the project. Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project
Week 08 - Experiment 05 Design, Simulation and Test of Finite State Machines Using Verilog And Implementation In FPGA.
Week 09 - Experiment 06 Design, Simulation and Test of an SAP computer Using Verilog And Implementation In FPGA.
Week 10 - Project Progress Presentation Present/demonstrate the technical progress of the project. Describe any necessary modification proposed to address public health and safety, cultural, societal, and environmental considerations related to the project
Week 11 - Lab Test Lab Test performed on Experiment 1-6
Week 12 - Peer Assessment and Viva - Present/demonstrate the technical progress, team and individual contribution and ethical principles applied to the design and implementation of the project, Answer Technical Questions related to the project Individually and ethical principles applied to the design and implementation of the project
Week 13 - Project Demonstration - Use multimedia and necessary documentation user manual, video demonstration and project report to clearly communicate the project

Course Outcome

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<br/>
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<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Statement</font></font></p>
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<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Correspon</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">ding</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(s)*</font></font></p>
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<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Domains</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">and</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Taxonomy</font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.08in"><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">level(s)**</font></font></p>
</td>
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<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Delivery</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Method(s)
and</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Activity(-ies)</font></font></p>
</td>
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</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">series</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">gates</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">in</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">breadboards</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(a)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.31in; margin-right: 0.31in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">P3</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.26in; margin-right: 0.2in; text-indent: -0.04in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Labwork</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Labtest</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.24in; margin-right: 0.07in; text-indent: -0.15in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab
Performance</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab
Test</font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.4in"><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Quiz</font></font></p>
</td>
</tr>
<tr valign="top">
<td width="22" height="55" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.06in; margin-right: 0.05in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO2</font></font></p>
</td>
<td width="222" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-right: 0.08in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>Construct
</b></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Verilog
programs and logic</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">circuits</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">for</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">solving</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">problems</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">related</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">to</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">digital</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">electronics,
understanding the practical</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">limitations</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(e)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.31in; margin-right: 0.31in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">P5</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.26in; margin-right: 0.2in; text-indent: -0.04in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Labwork</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Labtest</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.24in; margin-right: 0.07in; text-indent: -0.15in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab
Performance</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Lab
Test</font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.16in; margin-right: 0.15in; text-indent: 0.24in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Quiz</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Project</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.6pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font></p>
</td>
</tr>
<tr valign="top">
<td width="22" height="41" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.06in; margin-right: 0.05in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO3</font></font></p>
</td>
<td width="222" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="justify" style="orphans: 0; widows: 0; margin-left: 0.07in; margin-right: 0.27in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>design
</b></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">a
digital system to solve a relevant</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">problem
with due considerations to public</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">health</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">and
safety,</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">societal,
cultural</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">and</font></font></p>
<p align="justify" style="orphans: 0; widows: 0; margin-left: 0.07in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">environmental</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">consideration</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(c)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.33in"><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">P7</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.39in; margin-right: 0.38in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">--</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.13in; margin-right: 0.13in; text-indent: -0in; margin-top: 0.06in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Project</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Demonstration,</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Project</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font></p>
</td>
</tr>
<tr valign="top">
<td width="22" height="27" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.06in; margin-right: 0.05in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO4</font></font></p>
</td>
<td width="222" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-right: 0.08in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>demonstrate
</b></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">application
of ethical principles</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">and
practices</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">in</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">the</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">project,
and</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>evaluate</b></font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">peer</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">team</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.2pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">members</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">ethically</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(h)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.32in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">A3</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.39in; margin-right: 0.38in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">--</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.35in; margin-right: 0.1in; text-indent: -0.23in; margin-top: 0.07in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Peer
evaluation,</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font></p>
</td>
</tr>
<tr valign="top">
<td width="22" height="27" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.06in; margin-right: 0.05in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO5</font></font></p>
</td>
<td width="222" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-right: 0.26in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>work
</b></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">effectively
as an individual and as a</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">team</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">member
towards</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">the</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">successful</font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">completion</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">of</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">the</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">project</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(i)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.33in"><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">P4</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.39in; margin-right: 0.38in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">--</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.26in; margin-right: 0.24in; text-indent: -0.01in; margin-top: 0.07in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Viva,
Peer</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">evaluation</font></font></p>
</td>
</tr>
<tr valign="top">
<td width="22" height="26" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.06in; margin-right: 0.05in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO6</font></font></p>
</td>
<td width="222" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-right: 0.31in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><b>report
</b></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">effectively
on the design done for</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -2.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">CO3</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">with</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">presentation,</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">user-manual
and</font></font></p>
<p style="orphans: 0; widows: 0; margin-left: 0.07in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">detailed
report</font></font></p>
</td>
<td width="53" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.18in; margin-right: 0.18in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">PO(j)</font></font></p>
</td>
<td width="62" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p style="orphans: 0; widows: 0; margin-left: 0.32in"><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">A3</font></font></p>
</td>
<td width="71" style="border: 1px solid #000000; padding: 0in 0.08in"><p style="orphans: 0; widows: 0; margin-top: 0.01in; margin-bottom: 0in">
<br/>
</p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.39in; margin-right: 0.38in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">--</font></font></p>
</td>
<td width="86" style="border: 1px solid #000000; padding: 0in 0.08in"><p align="center" style="orphans: 0; widows: 0; margin-left: 0.15in; margin-right: 0.14in; margin-bottom: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Video</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: 0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Presentation</font></font></p>
<p align="center" style="orphans: 0; widows: 0; margin-left: 0.15in; margin-right: 0.14in; margin-top: 0in">
<font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Project</font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt"><span style="letter-spacing: -0.1pt">
</span></font></font><font face="Times New Roman, serif"><font size="2" style="font-size: 9pt">Report</font></font></p>
</td>
</tr>

EEE 415 (Jan 2025)

Mon, 01 Jan 2024 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team EEE 415 A (Jan 2025).

Offered to

L4-T1 Section B1 and B2 (2021 Intake)

Syllabus (as approved in 2022)

Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, complexity, metrics, and benchmark; Instruction Set Architecture, introduction to CISC and RISC, Instruction-Level Parallelism, pipelining, pipelining hazards and data dependency, branch prediction, exceptions and limits, super-pipelined vs superscalar processing; Memory hierarchy and management, Direct Memory Access, Translation Lookaside Buffer; cache, cache policies, multi-level cache, cache performance; Multicore computing, message passing, shared memory, cache-coherence protocol, memory consistency, paging, Vector Processor, Graphics Processing Unit, IP Blocks, Single Instruction Multiple Data and SoC with microprocessors. Simple Arm/RISC-V based processor design with VerilogHDL

Introduction to embedded systems design, software concurrency and Realtime Operating Systems, Arm Cortex M / RISC-V microcontroller architecture, registers and I/O, memory map and instruction sets, endianness and image, Assembly language programming of Arm Cortex M / RISC-V based embedded microprocessors (jump, call-return, stack, push and pop, shift, rotate, logic instructions, port operations, serial communication and interfacing), system clock, exceptions and interrupt handling, timing analysis of interrupts, general purpose digital interfacing, analog interfacing, timers: PWM, real-time clock, serial communication, SPI, I2C, UART protocols, Embedded Systems for Internet of Things (IoT)

Grading Policy

Class Attendance (10%) – Class participation and attendance will be recorded in every class. 30 Marks as per university AC policy
Continuous Assessment (20%) – 1 assignment (20) – Mandatory 3 Class tests, best 2 counted (40)
Final Examination (70%)– A comprehensive term final examination will be held at the end of the Term following the guideline of the Academic Council

Weekly Schedule

As per the routine published in the Department of EEE website.

Textbooks

[Harris] Sarah Harris, David Harris – “Digital Design and Computer Architecture, ARM Edition, Morgan Kaufmann (2015) - Chapter 6,7,8

[Patterson] David A. Patterson and John L. Hennessy, “Computer Organization and Design – The Hardware / Software Interface ARM edition” Morgan Kaufmann - Chapter 1

[Zhu] Yifeng Zhu “Embedded Systems with ARM Cortex-M Microcontrollers with Assembly Language and C”

Semester Plan

Week	Lectures	Topic	Textbook
1	1-3	Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, introduction to CISC and RISC, complexity, metrics, and benchmark.	Patterson 1
2	4-6	Assembly Language.	Harris 6.1-6.3
3	7-9	Assembly Language Programming.	Harris 6.3
4	10-12	Machine Language, Compiling, Assembling.	Harris 6.4
5	13-15	Performance Analysis, Single Cycle and Multicycle Processor.	Harris 7.1-7.4
6	16-18	Pipelining, Hazards, Advanced Microarchitecture.	Harris 7.5,7.7
7	19-21	Memory Systems – Cache and Virtual Memory.	Harris 8.2-8.4
8	20-24	Introducing Embedded System Design, IoT, Arm Cortex m4.	Lecture Slides
9	25-27	General Purpose Input Output.	Zhu 14
10	28-30	General Purpose Timers.	Zhu 15.1-15.3
11	31-33	Interrupts.	Zhu 11, 15.4
12	34-36	ADC + DAC.	Zhu 20,21
13	37-39	Serial Communication.	Zhu 22

EEE 415 (July 2023)

Mon, 01 Jan 2024 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team “EEE 415 C (July 2023)”.

Introduction

The syllabus of this course has been changed and the course has been completely redesigned from grounds up.

Syllabus (as approved in 2022)

Grading Policy

Class Attendance (10%) – Class participation and attendance will be recorded in every class. 30 Marks as per university AC policy
Continuous Assessment (20%) – 1 assignment (20) – Mandatory 3 Class tests, best 2 counted (40)
Final Examination (70%)– A comprehensive term final examination will be held at the end of the Term following the guideline of the Academic Council

Weekly Schedule

As per the routine published in the Department of EEE website.

Textbooks

[Harris] Sarah Harris, David Harris – “Digital Design and Computer Architecture, ARM Edition, Morgan Kaufmann (2015) - Chapter 6,7,8

[Patterson] David A. Patterson and John L. Hennessy, “Computer Organization and Design – The Hardware / Software Interface ARM edition” Morgan Kaufmann - Chapter 1

[Zhu] Yifeng Zhu “Embedded Systems with ARM Cortex-M Microcontrollers with Assembly Language and C”

Semester Plan

Week	Lectures	Topic	Textbook
1	1-3	Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, introduction to CISC and RISC, complexity, metrics, and benchmark.	Patterson 1
2	4-6	Assembly Language.	Harris 6.1-6.3
3	7-9	Assembly Language Programming.	Harris 6.3
4	10-12	Machine Language, Compiling, Assembling.	Harris 6.4
5	13-15	Performance Analysis, Single Cycle and Multicycle Processor.	Harris 7.1-7.4
6	16-18	Pipelining, Hazards, Advanced Microarchitecture.	Harris 7.5,7.7
7	19-21	Memory Systems – Cache and Virtual Memory.	Harris 8.2-8.4
8	20-24	Introducing Embedded System Design, IoT, Arm Cortex m4.	Lecture Slides
9	25-27	General Purpose Input Output.	Zhu 14
10	28-30	General Purpose Timers.	Zhu 15.1-15.3
11	31-33	Interrupts.	Zhu 11, 15.4
12	34-36	ADC + DAC.	Zhu 20,21
13	37-39	Serial Communication.	Zhu 22

EEE 416 (Jan 2025)

Mon, 01 Jan 2024 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team. EEE 416 B1 and B2 (Jan 2025)

Offered to

L4-T1 Section B1 and B2 (2021 Intake)

Syllabus

EEE 416

The sessional courses will be conducted in two parts. In the first part of the sessional course, the students will perform experiments in relevance with the EEE 415 course. In the second part of the course, the students will perform design projects to achieve specific program outcomes.

EEE 415

Course Objectives

To perform experiments in relevance with the theoretical concepts of the course EEE 415: Microprocessor and Embedded Systems
To conduct design projects in order achieve specific program outcomes described in the Course Outline

Course Outcomes

Upon successful completion of the course, students will be able to

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Utilize VerilogHDL, ARM assembly, C programming and microcontrollers boards for implementing and analyzing theoretical concepts at software and hardware levels	PO(e)	P4, C4	–	Lab Performance, Lab Test, Quiz, Viva, Project
CO2	Design an embedded system with appropriate considerations to safety, cultural, societal, and environmental considerations	PO(c)	C6	–	Project Report and Hardware demonstration
CO3	Assess impact of embedded systems project design on Societal, Health, Safety, Legal and Cultural Issues	PO(f)	C5	–	Presentation and Report
CO4	Evaluate Sustainability the and Impact of the Designed embedded systems Project in the Societal and Environmental Contexts	PO(g)	C5	–	Presentation and Report
CO5	Demonstrate membership and leadership in designing embedded system related problem solving	PO(i)	P7	–	Project logbook , Peer assessment, Viva, Presentation
CO6	Communicate effectively on embedded system related design with presentation and detailed report	PO(j)	A2	–	Video Presentation, Design Report
CO7	Demonstrate project management and cost analysis for embedded system project	PO(k)	A3	–	Project Report and Presentation

_ * Cognitive Domain Taxonomy Levels: C1 – Knowledge, C2 – Comprehension, C3 – Application, C4 – Analysis, C5 – Synthesis, C6 – Evaluation, Affective Domain Taxonomy Levels: A1: Receive; A2: Respond; A3: Value (demonstrate); A4: Organize; A5: Characterize; Psychomotor Domain Taxonomy Levels: P1: Perception; P2: Set; P3: Guided Response; P4: Mechanism; P5: Complex Overt Response; P6: Adaptation; P7: Organization Program Outcomes (PO): PO(a) Engineering Knowledge, PO(b) Problem Analysis, PO(c) Design/development Solution, PO(d) Investigation, PO(e) Modern tool usage, PO(f) The Engineer and Society, PO(g) Environment and sustainability, PO(h) Ethics, PO(i) Individual work and team work, PO(j). Communication, PO(k) Project management and finance, PO(l) Life-long Learning

For details of program outcome (PO) statements, please see the departmental website or course curriculum _

KPA Mapping

Weekly Plan

Week	Mode	Topic
1	Experiment 00	Introduction to Lab, Lab Policies and Tools
2	Experiment 01	Arm Cortex M: GPIO: Interfacing LED, Push-Button and Stepper Motor	CO1 (PO(e))
3	Experiment 02	Arm Cortex M: Interrupt and Timers I	CO1 (PO(e))
4	Experiment 03	Arm Cortex M: Interrupt and Timers II	CO1 (PO(e))
5	Presentation	· Project Proposal Presentation · Describe specific technical requirements to be attained during the project · Describe sustainability and impact of the work in societal and environmental contexts	CO4 (PO(g))
6	Experiment 04	Arm Cortex M: Analog Interfacing	CO1 (PO(e))
7	Experiment 05	Arm Assembly Language and Architecture	CO1 (PO(e))
8	Experiment 06	Arm Micro Architecture: Single Cycle, Multi Cycle and Pipelining	CO1 (PO(e))
9	Project Progress Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-1 · Present/demonstrate the technical progress of the project · Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project	CO2 (PO(c)) CO4 (PO(f))
10	Assessment	Lab Test	CO1 (PO(e))
12	Lab Quiz and Viva	Sessional Quiz	CO1 (PO(e)) CO2 (PO(c))
11	Project Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-2 · Present/demonstrate the technical progress of the project · Describe multidisciplinary aspects of the project · Describe how each team member has been effectively working (individually and as a member or leader) to attain the goals (Self- and peer-assessment of students)	CO5 (PO(c) CO7 (PO(i))
13	Final Presentation	· Describe how engineering management principles and economic decision-making applied to the project · Use multimedia and necessary documentation (user manual, video demonstration and project report) to clearly communicate the project	CO7 (PO(k)) CO6 (PO(j))
14	Project Demonstration	· Practical demonstration of the project: show evidence that specific technical requirements have been attained by the project	CO2 (PO(c))

Distribution of Marks

Class Participation and Attendance 10%
Lab Reports 5%
Lab Experiments 10%
Lab Test 15%
Sessional Quiz 15%
Final Project 45%
Total 100%

Lab Usage Policy

No Food or Drink is allowed in the laboratory.
At the beginning of each lab, please check out the “Embedded Systems Kit” box from Mr. Selim, writing your name and information in logbook. Please check individually if each component is in the box.
Report any missing parts at the beginning of the lab.
You will be financially responsible for unreported missing items
Do not separate / tear the jumper cable collection.
Before connecting the USB port, double check the power and ground connection of your externally connected components.

EEE 416 (July 2023)

Mon, 01 Jan 2024 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team.

2023Introduction

In the 2023 syllabus the 416 course will be heavily project focused. We will use the project of EEE 416 as a primary replacement of the Capstone Project, for culmination of program outcomes.

Syllabus

EEE 416

EEE 415

Course Objectives

To perform experiments in relevance with the theoretical concepts of the course EEE 415: Microprocessor and Embedded Systems
To conduct design projects in order achieve specific program outcomes described in the Course Outline

Course Outcomes

Upon successful completion of the course, students will be able to

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Utilize VerilogHDL, ARM assembly, C programming and microcontrollers boards for implementing and analyzing theoretical concepts at software and hardware levels	PO(e)	P4, C4	–	Lab Performance, Lab Test, Quiz, Viva, Project
CO2	Design an embedded system with appropriate considerations to safety, cultural, societal, and environmental considerations	PO(c)	C6	–	Project Report and Hardware demonstration
CO3	Assess impact of embedded systems project design on Societal, Health, Safety, Legal and Cultural Issues	PO(f)	C5	–	Presentation and Report
CO4	Evaluate Sustainability the and Impact of the Designed embedded systems Project in the Societal and Environmental Contexts	PO(g)	C5	–	Presentation and Report
CO5	Demonstrate membership and leadership in designing embedded system related problem solving	PO(i)	P7	–	Project logbook , Peer assessment, Viva, Presentation
CO6	Communicate effectively on embedded system related design with presentation and detailed report	PO(j)	A2	–	Video Presentation, Design Report
CO7	Demonstrate project management and cost analysis for embedded system project	PO(k)	A3	–	Project Report and Presentation

For details of program outcome (PO) statements, please see the departmental website or course curriculum _

KPA Mapping

Weekly Plan

Week	Mode	Topic
1	Experiment 00	Introduction to Lab, Lab Policies and Tools
2	Experiment 01	Arm Cortex M: GPIO: Interfacing LED, Push-Button and Stepper Motor	CO1 (PO(e))
3	Experiment 02	Arm Cortex M: Interrupt and Timers I	CO1 (PO(e))
4	Experiment 03	Arm Cortex M: Interrupt and Timers II	CO1 (PO(e))
5	Presentation	· Project Proposal Presentation · Describe specific technical requirements to be attained during the project · Describe sustainability and impact of the work in societal and environmental contexts	CO4 (PO(g))
6	Experiment 04	Arm Cortex M: Analog Interfacing	CO1 (PO(e))
7	Experiment 05	Arm Assembly Language and Architecture	CO1 (PO(e))
8	Experiment 06	Arm Micro Architecture: Single Cycle, Multi Cycle and Pipelining	CO1 (PO(e))
9	Project Progress Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-1 · Present/demonstrate the technical progress of the project · Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project	CO2 (PO(c)) CO4 (PO(f))
10	Assessment	Lab Test	CO1 (PO(e))
12	Lab Quiz and Viva	Sessional Quiz	CO1 (PO(e)) CO2 (PO(c))
11	Project Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-2 · Present/demonstrate the technical progress of the project · Describe multidisciplinary aspects of the project · Describe how each team member has been effectively working (individually and as a member or leader) to attain the goals (Self- and peer-assessment of students)	CO5 (PO(c) CO7 (PO(i))
13	Final Presentation	· Describe how engineering management principles and economic decision-making applied to the project · Use multimedia and necessary documentation (user manual, video demonstration and project report) to clearly communicate the project	CO7 (PO(k)) CO6 (PO(j))
14	Project Demonstration	· Practical demonstration of the project: show evidence that specific technical requirements have been attained by the project	CO2 (PO(c))

Distribution of Marks

Class Participation and Attendance 10%
Lab Reports 5%
Lab Experiments 10%
Lab Test 15%
Sessional Quiz 15%
Final Project 45%
Total 100%

Lab Usage Policy

No Food or Drink is allowed in the laboratory.
At the beginning of each lab, please check out the “Embedded Systems Kit” box from Mr. Selim, writing your name and information in logbook. Please check individually if each component is in the box.
Report any missing parts at the beginning of the lab.
You will be financially responsible for unreported missing items
Do not separate / tear the jumper cable collection.
Before connecting the USB port, double check the power and ground connection of your externally connected components.

BME 6103 (BME) Biophotonics (October 2023)

Sun, 01 Oct 2023 00:00:00 +0000

Welcome

Welcome to the course on BME 6103 Biophotonics. This course is offered to the Post Graduate Students of the Dept of BME, BUET. We are taking classes through Google Classroom and all communications for this course will be done through the class team of the course. This webpage will not be updated, and kept just for prospective students to have an idea about the course.

Class Schedule

Saturday 11am-1pm Room BME 1108, ECE Building, BUET

Syllabus

Course Content

Fundamentals of biophotonics: diverse applications, biophotonics spectral windows, light absorption, signal attenuation, emerging biomedical optical technologies, motivation for optical imaging; Behavior of light in biological tissue: physics of light-matter interaction, absorption, scattering, polarization and fluorescence. Optical fibers for biophotonic applications: overview of optical fibers, double-clad fibers, hard-clad silica fibers, biomedical applications; Light sources: radiometry, arc lamps, light-emitting diodes, lasers for biophotonics, superluminescent diodes; Optical detectors: the pin photodetector, avalanche photodiodes, multichannel detectors, photomultiplier tubes, optical couplers and circulators; Optical probes and biosensors: optical fiber probe, optical sensors, interferometric sensors, photonic crystal fiber biosensors, surface plasmon resonance biosensor. Spectroscopic methodologies: fluorescence spectroscopy, FRET/FLIM, fluorescence correlation spectroscopy, elastic scattering spectroscopy, diffuse correlation spectroscopy; Application of biophotonic instrumentation.

Textbooks

[Keiser] Biophotonics: Concepts to Applications 2nd Edition (2022) by Gerd Keiser Required to have a printed copy. Will be used in open book term final exam

Reference book [Prashad] Introduction to Biophotonics by Paras N. Prasad

[Tsia] Understanding Biophotonics: Fundamentals, Advances and Applications edited by Kevin K. Tsia

Learning Outcomes (LO)

On successful completion of this course unit, students should be able to:

Understand the Nano systems and Devices.
Become Advances in Device Technology.
Analyze the Nano Electro Mechanical Systems.
Demonstrate the bio functionality on silicon.

Teaching-learning Strategy

Class lectures, Case studies, Research papers review, Practical problem solution etc.

Grading Policy

Class Test- 20% (3 class tests, all class tests counted.)
Midterm Presentation - 30% (15 minutes presentation and Q A by the students on a relevant paper.)
Final Examination - 50% (Primarily focus on very basic concepts of the course and class discussions)

EECE 6609 (MIST) Nano Systems (October 2023)

Sun, 01 Oct 2023 00:00:00 +0000

Welcome

Welcome to the course on EECE 6609 Nano Systems. This course is offered to the Post Graduate Students of the Dept of EECE of the Military Institute of Science and Technology, with permissiion from the BUET authorities. We are taking classes through Google Classroom and all communications for this course will be done through the class team of the course. This webpage will not be updated, and kept just for prospective students to have an idea about the course.

Class Schedule

Saturday 3pm-6pm Room EECE 701, Tower 3, MIST

Background

This course is a first year graduate level course for students who are interested in doing research on Nano Systems and Nano Technology and their great wonders.

As a graduate level course, we would focus on active learning in the course, where you will participate in group project to grasp the concepts and learn about the vast field. The course will be really useful if you are thinking about pursuing research in Nanophotonics, or want to know more about the field.

Syllabus

Course Content

Nanosystems and Devices: Introduction- nanomaterials, nanodevices, nanostructures. Nanoscale Lithography: X-ray, Electron-Beam and Ion-Beam; Soft Lithography; Scanning Probe Lithography. Advances in Device Technology: nanoscale silicon devices, process technology, present challenges. Self Assembled Nanocrystals: self assembly, surface defects and passivation, structures, energy levels, transitions, luminescence and lasing. Nano Electro Mechanical Systems (NEMS): stress in thin films, mechanical to electrical transduction, surface engineering techniques, process flow, NEMS actuators, high aspect ratio system technology. Nano Biotechnology: scope and dimensions; detection of biological species on electrical, mechanical and optical criteria; Bio functionality on silicon; Biochip sensors and systems- structures, process technology.

Learning Outcomes (LO)

On successful completion of this course unit, students should be able to:

Understand the Nano systems and Devices.
Become Advances in Device Technology.
Analyze the Nano Electro Mechanical Systems.
Demonstrate the bio functionality on silicon.

Teaching-learning Strategy

Class lectures, Case studies, Research papers review, Practical problem solution etc.

Grading Policy

Final Review Papaer - 40%
Final presentaation - 10%
Final Examination - 50%

Expectation

It would be expected that by the end of the course, you are able to do a comprehensive review on a particular topic of interest and are able to effectively communicate it orally. Regular participation in class discussion is strongly encouraged. Although, preparing the class presentations and report would demand time and effort, hopefully, by successful completion of the work, you would have a publishable work, and we can discuss after the end of the semester if we can compile and publish the work.

It is expected that students sign an honour pledge for the class and refrain from plagiarising. All reports would be checked with turnitin plagiarism checker and any plagiarized work would be dealt with a “F” grade in the entire course.

Detailed Grading Policy

Final Project + Presentation (40%)

For Final Project, you must do an original comprehensive literature review on a particular topic relevant to the course and write a minimum 1600 word Review Article on it, with at least 35 literature references.

Scope of write up (including but not limited to):

Broad introduction of the field
Present Challenges
Fabrication methods
Breakthrough publications
Significant applications

Instruction:

You need to form groups of * students. Each group will work on a particular scope. I will circulate a google form where you can give choice regarding the topics. Each group’s broad topic should be unique.

Once you choose broad the topic, you need to do choose a special topic from it (as for example, from Nanophotonic systems a special topic can be imaging with metasurface). Your subtopic should be unique in a sense that there is no other review paper on the particular subtopic. Prepare a short outline of the paper (Introduction, Conclusion, which topics you will be covering etc) do a literature search on the topic and create an outline of your paper. Deadline to submit the outline is 2 weeks.

After I okay the outline, you need to do further literature search and form your review on the topic. You are expected to write a publishable review on the topic. Here are some resources that might help you in the process:

To improve writing skill, I highly recommend the Kristin Sainani’s course from Stanford University, . Complete week 1-5 of the course to improve your writing style.

Originality of work: The paper that you write must be an original work of your own writing. The goal of the assignment is for you to learn writing a review. The papers will be checked with plagiarism checking software. Any similarity with already published work will result in a failure (F) in the assignment. Read this article on

If you choose to do so, I am willing to work on the final paper further with the possibility of publishing it in a peer-reviewed journal. This will be done after completion of the grading of the course to avoid any bias on grades.

Review Article LaTeX Template

The following overleaf project is exclusively made for this project. You MUST use this template to format the final submission of your project. . Please note that the individual contribution of each section must be clearly marked with the \contributingauthor{} macro

Review Article Grading Criteria and Rubric

Title and Introduction (10 points)

Clarity and Relevance (3 points): Is the title clear and does it reflect the topic’s relevance to the course? Is the introduction engaging and informative?
Scope and Significance (3 points): Does the introduction clearly define the scope of the review article and its significance in the context of the course?
Thesis Statement (4 points): Is there a well-defined thesis statement that sets the direction for the review?

Literature Review (40 points)

Comprehensiveness (15 points): Does the literature review include a comprehensive collection of relevant sources (30-50 references)? Is the selection of sources well-justified?
Synthesis and Analysis (15 points): Does the review demonstrate the ability to synthesize and critically analyze the selected literature? Are key findings and trends identified?
Integration with Course Content (10 points): How effectively does the literature review integrate with the course content? Does it contribute to the course’s learning objectives?

Summary Figures and Tables (10 points)

Summary Figure (5 points): Is there a clear and informative summary figure that visually represents the key findings or concepts discussed in the review?
Summary Table (5 points): Is there an organized and concise summary table that highlights important details from the reviewed literature?

Organization and Clarity (15 points)

Structure (5 points): Is the article well-organized with clear sections (e.g., introduction, literature review, discussion)? Is there a logical flow of ideas?
Clarity of Expression (5 points): Is the writing clear, concise, and free from jargon? Are technical terms explained where necessary?
Transitions (5 points): Are there smooth transitions between paragraphs and sections, making it easy for the reader to follow the argument?

Quality of Figures (10 points)

Clarity and Relevance (5 points): Are the figures clear, relevant, and effectively used to support the content of the review?
Originality and Creativity (5 points): Do the figures demonstrate originality and creativity in visually presenting information?

Individual Contribution (25 points)

Contributions (15 points): Each team member’s individual contributions are clearly identified within the text. Each student’s contribution should align with their respective responsibilities.
Quality of Contribution (10 points): The individual contributions should demonstrate depth and relevance to the overall review.

Conclusion and Recommendations (10 points)

Summary (5 points): Does the conclusion effectively summarize the key findings and insights from the literature review?
Recommendations (5 points): Are there clear recommendations or implications based on the review’s findings?

References and Citations (10 points)

Accuracy (5 points): Are citations and references consistently formatted following a recognized citation style (e.g., APA, IEEE)? Are all sources properly credited?
Relevance (5 points): Are all references relevant to the topic, and do they contribute to the overall quality of the review?

Overall Quality (30 points)

Originality and Depth (10 points): Does the review exhibit original thought and in-depth analysis? Does it go beyond summarizing existing knowledge?
Engagement (10 points): Does the review article engage the reader and maintain their interest throughout?
Formatting and Aesthetics (10 points): Is the article properly formatted in the given LaTeX template and aesthetically pleasing?

Total (150 points)

Group Contribution (50 points): Assess group collaboration and whether each member fulfilled their roles and responsibilities.
Individual Contribution (25 points): Evaluate individual contributions based on the clarity and quality of each student’s work within the article.
Content and Elements (75 points): Assess the quality and completeness of the review article, including figures, tables, organization, and clarity.

Grading Scale:

135-150 points: Excellent
120-134 points: Very Good
105-119 points: Good
90-104 points: Fair
Below 90 points: Needs Improvement

EEE 6505 Nanophotonics and Plasmonics (April 2023)

Sat, 01 Apr 2023 00:00:00 +0000

Welcome

Welcome to the course on EEE 6505 Nanophotonics and Plasmonics. We are taking classes through Microsoft Teams and all communications for this course will be done through the class team of the course. This webpage will not be updated, and kept just for prospective students to have an idea about the course.

Class Schedule

Saturday 8am-11am Room EEE 625

2023 Notices

We will have our first lecture on 08/07/2023 Saturday 8am. Please come to the class by 7:55 am, as we need to free up the room at exactly 10:30 am.
Classes will be held offline with live lectures. Your physical presence will be needed for the class.
** In this year, the review article for final project should be of publishable quality to ensure that you receive the highest grade. **
If you are retaking the course due to an I grade or a grade improvement, you must separately participate all assessments. Marks from previous year’s course will not carry forward.

Background

I completed my PhD from Purdue University in Summer of 2019. I had acquired knowledge on modelling, fabricating and characterizing plasmonic metasurfaces for my PhD work, creating the thinnest color hologram with epitaxial silver based metasurface at the time of publication. I am really grateful to my supervisor Prof. Alexandra Boltasseva for introducing me to the area, and my mentor, Prof. Vladimir Shalaev for introducing me to the area of nanophotonics through his course in Purdue. This course is heavily influenced by Prof. Shalaev’s course (freely available on Nanohub), which I attended as a first year graduate student in Purdue.

This course would introduce graduate students to the field of Nanophotonics and its great wonders. We will talk about light-matter interaction in the nano-scale, how to make devices that goes beyond the diffraction limit, their theory, application and design.

As a graduate level course, we would focus on active learning in the course, where you will participate in group projects and individual assignments to grasp the concepts and learn about the vast field. The course will be really useful if you are thinking about pursuing research in Nanophotonics, or want to know more about the field.

Syllabus

Interaction of light with material; wave equation in matter from Maxwell’s equations; Dielectric properties of insulators, semiconductors and metals; Interaction of light with microstructures and nanostructures; Optical properties of metal-dielectric composites; Photonic Crystals: Electromagnetic effects in periodic media; One-, two- and three-dimensional photonic crystals; Applications of photonic crystals: omni-directional reflection, light localization, photonic crystal fibers; Surface Plasmons: Surface plasmon polariton at single interface, multilayer system, localized surface plasmons; Excitation of surface plasmon polariton; Prism coupling, grating coupling; Application of surface plasmons; Sub-wavelength waveguides, plasmonic photovoltaics, plasmonic bio-sensors; Metamaterials: Electric metamaterials, magnetic metamaterials, negative index metamaterials, hyperbolic metamaterials.

Suggested Text Books

John D. Joannopoulos, Steven G. Johnson, Joshua N. Winn, and Robert D. Meade, Photonic Crystals: Molding the Flow of Light second edition (Princeton Press, Freely available at )
Stephen A Maier, Plasmonics: Fundamentals and Applications,
Wenshan Cai, Vladimir Shalaev, Optical Metamaterials: Fundamentals and Applications,

Lesson Plan

(Subject to change based on student interest and class discussion)

08 Jul 2023 - Week 01 – Introduction

15 Jul 2023 - Week 02 – Light-Matter Interaction I

22 Jul 2023 - Week 03 – Light-Matter Interaction II

29 Jul 2023 - Week 04 – Discussion on Mid Term Presentation and Final Project

05 Aug 2023 - Week 05 – Photonic Crystals I

12 Aug 2023 - Week 06 – Photonic Crystals II

19 Aug 2023 - Week 07 – Mid Term Presentation I

26 Aug 2023 - Week 08 – Mid Term Presentation II

02 Sep 2023 - Week 09 – Metal Optics I

09 Sep 2023 - Week 10 – Metal Optics II

16 Sep 2023 - Week 11 – Applications of Plasmonics

23 Sep 2023 - Week 12 – Metamaterials

30 Sep 2023 - Week 13 – Final Project - I

07 Oct 2023 - Week 14 – Final Project - II

Grading Policy

Midterm Presentation - 25%
Final Project + Presentation - 40%
Class Tests - 10%
Final Examination - 25%

Incomplete Grade Policy

In this course, you will be given an I grade, ONLY if you complete the midterm and final presentation, and just fail to appear in the final exam due to reasons beyond your control. You must apply to Head of the Department within 1 week of commencement of the final exam. Failure to participate either the midterm or final projects would not be considered for I grade, and your grading would be done through the Grading criteria. Not participating in midterm or final project, as well as being absent in Final Exam will result in an F grade, regardless of the circumstances.

Expectation

Detailed Grading Policy

Class Test (10%)

There will be 4 class tests on the 4 broad topics of the course. Best 3 will be counted for 10% of the grade.

Midterm Presentation (25%)

Each student 10 minute offline/live presentation and 5 minutes question answer (points will be deducted for more than 12 minutes presentation) All students must attend the talks and participate in question answering.

Grading Rubric:

Peer Grading (30)
Instructor Grading (30)
Active Participation (30)
Punctuality (10)

Final Project + Presentation (40%)

Scope of write up (including but not limited to):

Broad introduction of the field
Present Challenges
Fabrication methods
Breakthrough publications
Significant applications

Instruction:

To improve writing skill, I highly recommend the Kristin Sainani’s course from Stanford University, . Complete week 1-5 of the course to improve your writing style.

Review Article LaTeX Template

Review Article Grading Criteria and Rubric

Title and Introduction (10 points)

Clarity and Relevance (3 points): Is the title clear and does it reflect the topic’s relevance to the course? Is the introduction engaging and informative?
Scope and Significance (3 points): Does the introduction clearly define the scope of the review article and its significance in the context of the course?
Thesis Statement (4 points): Is there a well-defined thesis statement that sets the direction for the review?

Literature Review (40 points)

Comprehensiveness (15 points): Does the literature review include a comprehensive collection of relevant sources (30-50 references)? Is the selection of sources well-justified?
Synthesis and Analysis (15 points): Does the review demonstrate the ability to synthesize and critically analyze the selected literature? Are key findings and trends identified?
Integration with Course Content (10 points): How effectively does the literature review integrate with the course content? Does it contribute to the course’s learning objectives?

Summary Figures and Tables (10 points)

Summary Figure (5 points): Is there a clear and informative summary figure that visually represents the key findings or concepts discussed in the review?
Summary Table (5 points): Is there an organized and concise summary table that highlights important details from the reviewed literature?

Organization and Clarity (15 points)

Structure (5 points): Is the article well-organized with clear sections (e.g., introduction, literature review, discussion)? Is there a logical flow of ideas?
Clarity of Expression (5 points): Is the writing clear, concise, and free from jargon? Are technical terms explained where necessary?
Transitions (5 points): Are there smooth transitions between paragraphs and sections, making it easy for the reader to follow the argument?

Quality of Figures (10 points)

Clarity and Relevance (5 points): Are the figures clear, relevant, and effectively used to support the content of the review?
Originality and Creativity (5 points): Do the figures demonstrate originality and creativity in visually presenting information?

Individual Contribution (25 points)

Contributions (15 points): Each team member’s individual contributions are clearly identified within the text. Each student’s contribution should align with their respective responsibilities.
Quality of Contribution (10 points): The individual contributions should demonstrate depth and relevance to the overall review.

Conclusion and Recommendations (10 points)

Summary (5 points): Does the conclusion effectively summarize the key findings and insights from the literature review?
Recommendations (5 points): Are there clear recommendations or implications based on the review’s findings?

References and Citations (10 points)

Accuracy (5 points): Are citations and references consistently formatted following a recognized citation style (e.g., APA, IEEE)? Are all sources properly credited?
Relevance (5 points): Are all references relevant to the topic, and do they contribute to the overall quality of the review?

Overall Quality (30 points)

Originality and Depth (10 points): Does the review exhibit original thought and in-depth analysis? Does it go beyond summarizing existing knowledge?
Engagement (10 points): Does the review article engage the reader and maintain their interest throughout?
Formatting and Aesthetics (10 points): Is the article properly formatted in the given LaTeX template and aesthetically pleasing?

Total (150 points)

Group Contribution (50 points): Assess group collaboration and whether each member fulfilled their roles and responsibilities.
Individual Contribution (25 points): Evaluate individual contributions based on the clarity and quality of each student’s work within the article.
Content and Elements (75 points): Assess the quality and completeness of the review article, including figures, tables, organization, and clarity.

Grading Scale:

135-150 points: Excellent
120-134 points: Very Good
105-119 points: Good
90-104 points: Fair
Below 90 points: Needs Improvement

EEE 415 (January 2023)

Sun, 01 Jan 2023 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team “EEE 415 A (Jan 2022)”.

Introduction

The syllabus of this course has been changed and the course has been completely redesigned from grounds up.

Syllabus (as approved in 2022)

Grading Policy

Class Attendance (10%) – Class participation and attendance will be recorded in every class. 30 Marks as per university AC policy
Continuous Assessment (20%) – 1 assignment (20) – Mandatory 3 Class tests, best 2 counted (40)
Final Examination (70%)– A comprehensive term final examination will be held at the end of the Term following the guideline of the Academic Council

Weekly Schedule

As per the routine published in the Department of EEE website.

Textbooks

[Harris] Sarah Harris, David Harris – “Digital Design and Computer Architecture, ARM Edition, Morgan Kaufmann (2015) - Chapter 6,7,8

[Patterson] David A. Patterson and John L. Hennessy, “Computer Organization and Design – The Hardware / Software Interface ARM edition” Morgan Kaufmann - Chapter 1

[Zhu] Yifeng Zhu “Embedded Systems with ARM Cortex-M Microcontrollers with Assembly Language and C”

Semester Plan

Week	Lectures	Topic	Textbook
1	1-3	Fundamentals of microprocessor and computer design, processor data path, architecture, microarchitecture, introduction to CISC and RISC, complexity, metrics, and benchmark.	Patterson 1
2	4-6	Assembly Language.	Harris 6.1-6.3
3	7-9	Assembly Language Programming.	Harris 6.3
4	10-12	Machine Language, Compiling, Assembling.	Harris 6.4
5	13-15	Performance Analysis, Single Cycle and Multicycle Processor.	Harris 7.1-7.4
6	16-18	Pipelining, Hazards, Advanced Microarchitecture.	Harris 7.5,7.7
7	19-21	Memory Systems – Cache and Virtual Memory.	Harris 8.2-8.4
8	20-24	Introducing Embedded System Design, IoT, Arm Cortex m4.	Lecture Slides
9	25-27	General Purpose Input Output.	Zhu 14
10	28-30	General Purpose Timers.	Zhu 15.1-15.3
11	31-33	Interrupts.	Zhu 11, 15.4
12	34-36	ADC + DAC.	Zhu 20,21
13	37-39	Serial Communication.	Zhu 22

EEE 303 (July 2022)

Fri, 01 Jul 2022 00:00:00 +0000

EEE 303 - Digital Electronics

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

EEE 303 - Digital Electronics

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Course Outcomes

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Analyze the structure and behaviour of different types of combinational and sequential digital logic circuits	PO1	C4	Lectures, Homework	Class test, Final exam
CO2	identify the requirements of physically implementing digital electronic circuits, different logic technologies and memory circuits	PO5	C2	Lectures, Homework	Class test, Final exam
CO3	design combinational and sequential logic circuits with practical constraints using Verilog	PO3	C6	Lectures, Tutorials, Homework	Assignment Class test, Final exam

Course Outline

Week	Topic
1	Introduction to Number Systems and codes. Introduction to Boolean algebra, Introduction to VerilogHDL	Harris 1.4, 5.3, 1.5
2-3	Analysis and synthesis of digital logic circuits: Basic logic function, combinational logic design, Universal logic gates, Minimization of combinational logic, k-map	Harris 2.1-2.9
4	Programming and structural and behavioral design of digital systems using VerilogHDL, Verilog Timing analysis and test bench. Verilog synthesis with combinational logic	Harris 4
5	ALU design (Adder, Subtractor, Comparator)	Harris 5.2- Floyd 6.1-6.3
6	Decoder, encoder, Multiplexer, demultiplexer	Floyd 6.4-6.9
7	MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic circuits, transmission gates, Modular combinational circuit design: pass transistor, pass gates, and their implementation in CMOS	Harris 1.7-1.8
	MIDTERM
8	Sequential circuits: different types of latches, flip-flops	Harris 3.1-3.2 Floyd 7.1-7.3
9	Modular sequential logic circuit design: shift registers, counters, and application	Floyd 8.1-8.3, 9.2-9.7
10-11	Asynchronous and synchronous sequential circuits., Introducing State Machine Design, State Minimization, Mille and Moore type state machine, design of simple FSM using Verilog	Harris 3.4
12-13	Design of a Simple-As-Possible (SAP) computer: SAP-1, selected concepts from SAP-2 (jump, call, return)	Malvino Ch10,11 (partially)
13	Dual Inline Packaged and Surface Mount Device (SMD) Integrated Circuits, Introduction to System Integration and Printed Circuit Board design, Memories: classification and architecture, RAM memory cells, Read only memory	Lecture Slides Harris 5.5

Textbooks

[Harris] Digital Design and Computer Architecture ARM Edition
[Brown] Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design” 3rd Edition, McGraw Hill (2014)
[Floyd] Thomas L. Floyd, “Digital Fundamentals” 11th Edition, Pearson (2015)
[Mano] Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL” 5th Edition, Pearson (2013)
[Malvino] Albert P. Malvino, Jerald A. Brown - Digital Computer Electronics-McGraw-Hill (1993)

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 304 (July 2022)

Fri, 01 Jul 2022 00:00:00 +0000

EEE 304 - Digital Electronics Laboratory

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

Course Outline

Week 1 - Introduction to EEE 304 Lab
Week 2 - Experiment No. 01:Introduction to Basic Gates and Logic Simplification Techniques
Week 3 - Experiment No. 02: Introduction to Digital Circuit Design Concept in FPGA
Week 4 - Experiment No. 03: Design and implementation of different adder, subtractor and comparator circuits.
Week 5 - Experiment No. 04: Design of Decoder/Encoder/Multiplexer circuit
Week 6 - Experiment No. 05: Design of Arithmatic Circuits Using Verilog and Implementation In FPGA
Week 7 - Lab Test 1
Week 8 - Experiment No. 06: Design, Simulation and Test of Comibnation Circuits Using Verilog and Implementation In FPGA
Week 9 - Experiment No. 07: Sequential circuit design –Latch, Flip-flop and Registers
Week 10 - Experiment No. 08: Design, Simulation And Test of Sequential Circuits Using Verilog and Implementation In FGPA.
Week 11 - Labtest 2
Week 12 - Final Quiz
Week 13 - Final Project Submission

EEE 6505 Nanophotonics and Plasmonics (April 2022)

Fri, 01 Apr 2022 00:00:00 +0000

Welcome

Class Schedule

Sunday 5pm-8pm

Background

This course would introduce graduate students to the field of Nanophotonics and its great wonders. We will talk about light-matter interaction in the nanoscale, how to make devices that goes beyond the diffraction limit, their theory, application and design.

Syllabus

Suggested Text Books

John D. Joannopoulos, Steven G. Johnson, Joshua N. Winn, and Robert D. Meade, Photonic Crystals: Molding the Flow of Light second edition (Princeton Press, Freely available at )
Stephen A Maier, Plasmonics: Fundamentals and Applications,
Wenshan Cai, Vladimir Shalaev, Optical Metamaterials: Fundamentals and Applications,

Grading criteria

Midterm Presentation - 30% (15 minutes presentation and Q A by the students on a relevant paper.)
Final Report - 40% (For final report, you must do a comprehensive literature review on a particular topic relevant to the course and write a 1600 word review on it, with around 20-30 literature references. The goal is to combine multiple reports and to form a scientific review article on a particular focus (will discuss more on class))
Final Presentation - 10% (15 minutes power point presentation highlighting your final report)
Final Examination - 20% (Primarily focus on very basic concepts of the course and class discussions)

Expectation

Lesson Plan

(Subject to change based on student interest and class discussion)

Week 01 – Introduction

Week 02 – Light-Matter Interaction I

Week 03 – Light-Matter Interaction II

Week 04 – Photonic Crystals I

Week 05 – Photonic Crystals II

Week 06 – Discussion on Mid Term Presentation and Final Project

Week 07 – Mid Term Presentation I

Week 08 – Mid Term Presentation II

Week 09 – Metal Optics I

Week 10 – Metal Optics II

Week 11 – Applications of Plasmonics

Week 12 – Metamaterials

Week 13 – Final Project - I

Week 14 – Final Project - II

Midterm Presentation

Each student 10 minute presentation and 5 minutes question answer (points will be deducted for more than 12 minutes presentation) Send me a video recording. Recording will be played and Q&A will be Live. All students must attend the talks and participate in question answering.

Tentative grading rubric:

Clarity of presentation: 20
Demonstration that you understood the concept: 10
Broad introduction of the topic: 10
Explanation of results: 10
Ability to face questions on the presentation: 10
Active Participation in other presentations: 40
Attending each presentation: 20

Active participation: (you have to ask at least 4 questions in other presentations)

Final Project

For the final project of the course, you need to work in a group to write an original comprehensive review on any topic related to the course material. The review itself needs to be novel (no similar review should exist in literature).

Scope of write up (including but not limited to):

Broad introduction of the field
Present Challenges
Fabrication methods
Breakthrough publiactions
Significant applications

Instruction:

To improve writing skill, I highly recommend the Kristin Sainani’s course from Stanford University, . Complete week 1-5 of the course to improve your writing style.

EEE 415 (January 2022)

Sat, 01 Jan 2022 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team “EEE 415 A (Jan 2022)”.

Introduction

The syllabus of this course has been changed and the course has been completely redesigned from grounds up.

Syllabus (as approved in 2022)

Grading Policy

Class Attendance (10%) – Class participation and attendance will be recorded in every class. 30 Marks as per university AC policy
Continuous Assessment (20%) – 1 assignment (20) – Mandatory 3 Class tests, best 2 counted (40)
Final Examination (70%)– A comprehensive term final examination will be held at the end of the Term following the guideline of the Academic Council

Weekly Schedule

Sat 12pm
Wed 9am
Wed 10am

Textbooks

[Harris] Sarah Harris, David Harris – “Digital Design and Computer Architecture, ARM Edition, Morgan Kaufmann (2015) - Chapter 6,7,8

[Patterson] David A. Patterson and John L. Hennessy, “Computer Organization and Design – The Hardware / Software Interface ARM edition” Morgan Kaufmann - Chapter 1

[Zhu] Yifeng Zhu “Embedded Systems with ARM Cortex-M Microcontrollers with Assembly Language and C”

Semester Plan

Week 01 - Introduction (Patternson Ch1)
Week 02 - Assembly Language (Harris Ch6)
Week 03 - Architecture (Harris Ch6)
Week 04 - MicroArchitecture, Single Cycle Computer (Harris Ch7)
Week 05 - Pipelining, (Harris Ch7)
Week 06 - Advanced Microarchitectures (Harris Ch7)
Week 07 - Memory (Harris Ch8)
Midterm
Week 8-14 TBA

EEE 416 (January 2022)

Sat, 01 Jan 2022 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team.

Introduction

The syllabus of this course has been changed and the course has been completely redesigned from grounds up. There has been a lab development proposal that is under consideration with the University authority. We anticipate changing to FPGA based Microprocessor design and ARM/RISC-V Microcontroller based embedded systems design. As procurement is a time-consuming process, we might need to improvise and use existing lab infrastructure for this semester.

Syllabus (as approved in 2022)

EEE 303 (July 2021)

Thu, 01 Jul 2021 00:00:00 +0000

EEE 303 - Digital Electronics

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

EEE 303 - Digital Electronics

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Course Outline

Week 1 - (Brown 5.1, 5.7, 2.10, Floyd 2.1-2.10) - Introduction to Course, Introduction to Number Systems and codes. Introduction to verilog
Week 2 - (Floyd 3.1-3.7,4 Brown 2.1-2.9) - Analysis and synthesis of digital logic circuits: Basic logic function, Boolean algebra, combinational logic design, minimization of combinational logic (k-map)
Week 3 - (Floyd 3.1-3.7,4 Brown 4.1-4.5) Boolean algebra, combinational logic design, Minimization of combinational logic (k-map)
Week 4 - (Floyd 5, Brown 2.7,2.10, 5.2-5.4, 5.6 supplimentary) Universal logic gates, binary arithmetic elements and ALU design, Verilog synthesis with combinational logic
Week 5 - (Brown 6.1-6.6, Floyd 6) Decoder, encoder, comparators,
Week 6 - (Brown 7.1-7.15) Sequential circuits: different types of latches, flip-flops, Modular sequential logic circuit design: shift registers, counters, and application, timing analysis and power optimization of sequential circuits.
Week 7 - Completing topics of week6, Classtests and Revision
Week 8 - (Brown 8.1-8.8, Brown 8) - Synchronous sequential circuits, State Machine Design, Algorithmic State Machine (ASM)
Week 9 - ,
Week 10 - (Floyd 11) Asynchronous sequential circuits, Pass Transistor
Week 11 - (Floyd 15) MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic circuits, transmission gates, sequential logic circuits,
Week 12 - (Brown 6.1) BJT digital circuits: ECL, TTL, STTL, BiCMOS
Week 13 - Memories: classification and architecture, RAM memory cells, Read only memory, data converters,

Textbooks

Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design”
Thomas L. Floyd, “Digital Fundamentals Eleventh Edition”
Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL”

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 304 (July 2021)

Thu, 01 Jul 2021 00:00:00 +0000

EEE 304 - Digital Electronics Laboratory

For latest announcements and updates, please refer to the Class Team in your Microsoft Teams account. Please contact me if you have not been added to the class Team.'

Course Outline

Week 1 - Introduction to EEE 304 Lab
Week 2 - Experiment No. 01:Introduction to Basic Gates and Logic Simplification Techniques
Week 3 - Experiment No. 02: Introduction to Digital Circuit Design Concept in FPGA
Week 4 - Experiment No. 03: Design and implementation of different adder, subtractor and comparator circuits.
Week 5 - Experiment No. 04: Design of Decoder/Encoder/Multiplexer circuit
Week 6 - Experiment No. 05: Design of Arithmatic Circuits Using Verilog and Implementation In FPGA
Week 7 - Lab Test 1
Week 8 - Experiment No. 06: Design, Simulation and Test of Comibnation Circuits Using Verilog and Implementation In FPGA
Week 9 - Experiment No. 07: Sequential circuit design –Latch, Flip-flop and Registers
Week 10 - Experiment No. 08: Design, Simulation And Test of Sequential Circuits Using Verilog and Implementation In FGPA.
Week 11 - Labtest 2
Week 12 - Final Quiz
Week 13 - Final Project Submission

EEE 6505 Nanophotonics and Plasmonics (April 2021)

Thu, 01 Apr 2021 00:00:00 +0000

Welcome

Announcement

Here is a link to the first class:

Time: Jul 24, 2021 05:30 PM Astana, Dhaka

Background

Syllabus

Suggested Text Books

John D. Joannopoulos, Steven G. Johnson, Joshua N. Winn, and Robert D. Meade, Photonic Crystals: Molding the Flow of Light second edition (Princeton Press, Freely available at )
Stephen A Maier, Plasmonics: Fundamentals and Applications,
Wenshan Cai, Vladimir Shalaev, Optical Metamaterials: Fundamentals and Applications,

Grading criteria

Midterm Presentation - 30% (15 minutes presentation and Q A by the students on a relevant paper.)
Final Report - 40% (For final report, you must do a comprehensive literature review on a particular topic relevant to the course and write a 1600 word review on it, with around 20-30 literature references. The goal is to combine multiple reports and to form a scientific review article on a particular focus (will discuss more on class))
Final Presentation - 10% (15 minutes power point presentation highlighting your final report)
Final Examination - 20% (Primarily focus on very basic concepts of the course and class discussions)

Expectation

Lesson Plan

(Subject to change based on student interest and class discussion)

Week 01 – Introduction

Week 02 – Light-Matter Interaction I

Week 03 – Light-Matter Interaction II

Week 04 – Photonic Crystals I

Week 05 – Photonic Crystals II

Week 06 – Discussion on Mid Term Presentation and Final Project

Week 07 – Mid Term Presentation I

Week 08 – Mid Term Presentation II

Week 09 – Metal Optics I

Week 10 – Metal Optics II

Week 11 – Applications of Plasmonics

Week 12 – Metamaterials

Week 13 – Final Project - I

Week 14 – Final Project - II

Midterm Presentation

Tentative grading rubric:

Clarity of presentation: 20
Demonstration that you understood the concept: 10
Broad introduction of the topic: 10
Explanation of results: 10
Ability to face questions on the presentation: 10
Active Participation in other presentations: 40
Attending each presentation: 20

Active participation: (you have to ask at least 4 questions in other presentations)

Final Project

Scope of write up (including but not limited to):

Broad introduction of the field
Present Challenges
Fabrication methods
Breakthrough publiactions
Significant applications

Instruction:

To improve writing skill, I highly recommend the Kristin Sainani’s course from Stanford University, . Complete week 1-5 of the course to improve your writing style.

EEE 415 (January 2021)

Fri, 01 Jan 2021 00:00:00 +0000

Announcement

This website is not going to be updated. For online classes, we have migrated to the Institutional Microsoft Teams account. Please contact me if you have not been added to the class Team.'

Schedule

Sat 9pm
Mon 9pm
Wed 10am

EEE 416 (January 2021)

Fri, 01 Jan 2021 00:00:00 +0000

Announcement

This website is not going to be updated. For online classes, we have migrated to the Institutional Microsoft Teams account. Please contact me if you have not been added to the class Team.'

EEE 416 (January 2023)

Fri, 01 Jan 2021 00:00:00 +0000

Announcement

We will use Microsoft Teams for disbursing class materials for the course. Please contact your respective course instructor if you have not been added to the class team.

2023Introduction

In the 2023 syllabus the 416 course will be heavily project focused. We will use the project of EEE 416 as a primary replacement of the Capstone Project, for culmination of program outcomes.

Syllabus

EEE 416

EEE 415

Course Objectives

To perform experiments in relevance with the theoretical concepts of the course EEE 415: Microprocessor and Embedded Systems
To conduct design projects in order achieve specific program outcomes described in the Course Outline

Course Outcomes

Upon successful completion of the course, students will be able to

CO No.	CO Statement	Corresponding PO(s)*	Domains and Taxonomy level(s)**	Delivery Method(s) and Activity(-ies)	Assessment Tool(s)
CO1	Utilize VerilogHDL, ARM assembly, C programming and microcontrollers boards for implementing and analyzing theoretical concepts at software and hardware levels	PO(e)	P4, C4	–	Lab Performance, Lab Test, Quiz, Viva, Project
CO2	Design an embedded system with appropriate considerations to safety, cultural, societal, and environmental considerations	PO(c)	C6	–	Project Report and Hardware demonstration
CO3	Assess impact of embedded systems project design on Societal, Health, Safety, Legal and Cultural Issues	PO(f)	C5	–	Presentation and Report
CO4	Evaluate Sustainability the and Impact of the Designed embedded systems Project in the Societal and Environmental Contexts	PO(g)	C5	–	Presentation and Report
CO5	Demonstrate membership and leadership in designing embedded system related problem solving	PO(i)	P7	–	Project logbook , Peer assessment, Viva, Presentation
CO6	Communicate effectively on embedded system related design with presentation and detailed report	PO(j)	A2	–	Video Presentation, Design Report
CO7	Demonstrate project management and cost analysis for embedded system project	PO(k)	A3	–	Project Report and Presentation

For details of program outcome (PO) statements, please see the departmental website or course curriculum _

KPA Mapping

Weekly Plan

Week	Mode	Topic
1	Experiment 00	Introduction to Lab, Lab Policies and Tools
2	Experiment 01	Arm Cortex M: GPIO: Interfacing LED, Push-Button and Stepper Motor	CO1 (PO(e))
3	Experiment 02	Arm Cortex M: Interrupt and Timers I	CO1 (PO(e))
4	Experiment 03	Arm Cortex M: Interrupt and Timers II	CO1 (PO(e))
5	Presentation	· Project Proposal Presentation · Describe specific technical requirements to be attained during the project · Describe sustainability and impact of the work in societal and environmental contexts	CO4 (PO(g))
6	Experiment 04	Arm Cortex M: Analog Interfacing	CO1 (PO(e))
7	Experiment 05	Arm Assembly Language and Architecture	CO1 (PO(e))
8	Experiment 06	Arm Micro Architecture: Single Cycle, Multi Cycle and Pipelining	CO1 (PO(e))
9	Project Progress Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-1 · Present/demonstrate the technical progress of the project · Describe contextual knowledge to assess societal, health, safety, legal and cultural issues relevant to the project	CO2 (PO(c)) CO4 (PO(f))
10	Assessment	Lab Test	CO1 (PO(e))
12	Lab Quiz and Viva	Sessional Quiz	CO1 (PO(e)) CO2 (PO(c))
11	Project Demonstration/ Presentation	· Project Progress Demonstration/ Presentation-2 · Present/demonstrate the technical progress of the project · Describe multidisciplinary aspects of the project · Describe how each team member has been effectively working (individually and as a member or leader) to attain the goals (Self- and peer-assessment of students)	CO5 (PO(c) CO7 (PO(i))
13	Final Presentation	· Describe how engineering management principles and economic decision-making applied to the project · Use multimedia and necessary documentation (user manual, video demonstration and project report) to clearly communicate the project	CO7 (PO(k)) CO6 (PO(j))
14	Project Demonstration	· Practical demonstration of the project: show evidence that specific technical requirements have been attained by the project	CO2 (PO(c))

Distribution of Marks

Class Participation and Attendance 10%
Lab Reports 5%
Lab Experiments 10%
Lab Test 15%
Sessional Quiz 15%
Final Project 45%
Total 100%

Lab Usage Policy

No Food or Drink is allowed in the laboratory.
At the beginning of each lab, please check out the “Embedded Systems Kit” box from Mr. Selim, writing your name and information in logbook. Please check individually if each component is in the box.
Report any missing parts at the beginning of the lab.
You will be financially responsible for unreported missing items
Do not separate / tear the jumper cable collection.
Before connecting the USB port, double check the power and ground connection of your externally connected components.

EEE 303 (January 2020)

Wed, 01 Jan 2020 00:00:00 +0000

Announcement

This website is not going to be updated. For online classes, we have migrated to the Institutional Microsoft Teams account. Please contact me if you have not been added to the class Team.'

Welcome

“There are 10 types of people in this world. Those who understand binary, and those who doesn’t.”

Welcome to the course on Digital Electronics, where we will explore the very fundamental concepts that makes most of our modern consumer electronic products function.

Office Hours

Tues 12-1pm (Section A) Saturday 12-1pm (Section B) I will be in my office at EEE 222, and students are welcome to drop by with any questions/problems related to the class or for conceptual understanding of the topics. Other than office hours, prior appointment must be made to schedule a meeting. For any course related matter outside the class, preferred medium of communication is email

Course Outline

Week 1 - (Brown 5.1, Floyd 2.1-2.10) - Introduction to Course, Introduction to Number Systems and codes. Introduction to verilog
Week 2 - (Floyd 3.1-3.7,4 Brown 2.1-2.9) - Analysis and synthesis of digital logic circuits: Basic logic function, Boolean algebra, combinational logic design, minimization of combinational logic (k-map)
Week 3 - (Floyd 5, Brown 4) universal logic gates, verilog synthesis with combinational logic
Week 4 - (Floyd 6, Brown 7) Decoder, encoder, comparators, binary arithmetic elements and ALU design
Week 5 - (Brown 7, Floyd 7) Sequential circuits: different types of latches, flip-flops
Week 6 - (Brown 7) Modular sequential logic circuit design: shift registers, counters, and application
Week 7 - (Brown 9.1-9.3, 8.1) Asynchronous and synchronous sequential circuits
Week 8 - (Brown 7.15, Brown 8) State Machine Design, Algorithmic State Machine (ASM), timing analysis and power optimization of sequential circuits.
Week 9 - MOSFET Digital circuits: NMOS inverter, CMOS inverter, CMOS logic circuits, Clocked CMOS logic circuits, transmission gates,
Week 10 - (Floyd 11) Memories: classification and architecture, RAM memory cells, Read only memory, data converters
Week 11 - (Floyd 15) BJT digital circuits: ECL, TTL, STTL, BiCMOS, Design application A static ECL gate
Week 12 - (Brown 6.1) Modular combinational circuit design: pass transistor, pass gates, multiplexer, demultiplexer and their implementation in CMOS

Lecture Notes

The lecture slides for this offering are no longer available online.

Lecture 1 - Introduction
Lecture 2,3 - Number systems and codes
Lecture 4,5,6 - Boolean Algebra, K-map, Boolean Analysis and Synthesis
Lecture 7,8 - Verilog syntax, universal gates
Lecture 9 - Classtest 1 - 1pm

Classtest Syllabus

Classtest 1

Contents of Week 1 and Week 2 from above.

Homework Problems

N.B. - Please write the following on the top of the homework:

Name:

Student ID:

Course Number: EEE 303

Course Instructor: Dr. Sajid Muhaimin Choudhury

Homework Number: 1A Date of Submission: XX

Homework 1A

An alien species have landed on earth that have four hands with 9 fingers on each hand (36 fingers in total). They follow a base-36 number system. We will define variable ‘X’ and variable ‘Y’ in their number system. The first 3 letters of your first name is variable X, last 3 letters of your last name is variable Y, first letter of your last name is variable Z (For example for Mahbubur Rahman, X=MAH, Y=MAN, Z=R, X,Y,Z are in base-36)

Problem 1: Convert X and Y to decimal, binary, hexadecimal and octal number

Problem 2: In binary and decimal, compute X+Y, X-Y. Compute 2’s complement of Y in binary and recompute X-Y

Problem 3: Represent the floating point number X.Y in IEEE single precision floating point number

Problem 4: Convert X to grey code and ASCII

Problem 5: Install Altera Quartus. Show the value of Z in Binary and hexadecimal. Attach a printed copy of the waveform with your file

Homework 1B

Problem 1: Convert Z from problem 1 into binary and take the first 8 bits from the MSB. Assume the function f(A,B,C) is defined as these first 8 bits denoted by ‘G’. Write the truth table of the function, write the function in terms of Sum of Products and Product of Sum form, and draw a K-map of the function and reduce it to minimum form.

Problem 2: Write a verilog code that generates fibonacci sequence of a number. ( )

Fibonacci number, F_n = F_(n-1) + F_(n-2); F_0 = 1; F_1 = 1

Input: clock Output: 16 bit fibonacci number

each time clock changes state from 0 to 1, the fibonacci number output is changed, showing from F_0, F_1, F_2 etc.

Case 1: F_0 = 1; F_1 = 1; (Regular fibonacci number) Case 2: F_0 = G; and F_1 = 1;

Show (print) output for both cases for 16 different clock changes

Textbooks

Stephen Brown and Zvonko Vranesic, “Fundamentals of Digital Logic with Verilog Design”
Thomas L. Floyd, “Digital Fundamentals Eleventh Edition”
Morris Mano and Michael Ciletti, “Digital Design with an Introduction to VerilogHDL”

Additional Resources

Proteus Tutorial:
Verilog Tutorial:
Springer has a free book available to download from there website ( ) called Introduction to Logic Circuits & Logic Design with Verilog by B. J. LaMeres (DOI:https://doi.org/10.1007/978-3-030-13605-5_8). We will teach some of the lectures from this book as it has very intuitive approach to a lot of the problems.

EEE 6408 Nano Systems (October 2019)

Tue, 01 Oct 2019 00:00:00 +0000

Welcome

Welcome to the course on EEE 6408 Nano Systems

Background

As a PhD student, I had the privilege to work in the Birck Nanotechnology Center, that housed the largest academic cleanroom in the world at its inception. I had the opportunity to gain hands on experience in nanofabrication and characterization, and would be happy to share my knowledge and experience amongst young researchers and scholars. At the same time, the field of Nano Systems is rapidly developing, and the students of the course need to stay uptodate with the current trends and the state of the art.

Learning Objectives

In this course we would learn about different aspects of Nano Systems. The thrust of the course focus would be in two directions. In first thrust, we will learn about Nano fabrication techniques (lithography, ion milling, etching, vaccum deposition etc), nano measurements and characterization techniques (SEM, XRD, TEM, Optical characterization). Second thrust, we will explore recent advances of Nano Systems such as nano biosensors, nanophotonic systems, nano electro-mechanical systems (NEMS) etc. The course would focus more on developing review of scholarly articles and scientific communication of such articles.

Grading criteria

Midterm Presentation - 30% (15 minutes presentation and Q A by the students on a relevant paper.)
Final Report - 40% (For final report, you must do a comprehensive literature review on a particular topic relevant to the course and write a 1600 word review on it, with around 20-30 literature references. The goal is to combine multiple reports and to form a scientific review article on a particular focus (will discuss more on class))
Final Presentation - 10% (15 minutes power point presentation highlighting your final report)
Final Examination - 20% (Primarily focus on very basic concepts of the course and class discussions)

Expectation

It would be expected that by the end of the course, you are able to do a comprehensive review on a particular topic of interest and are able to communicate it orally. Regular participation in class discussion is strongly encouraged. Although, preparing the class presentations and report would demand time and effort, hopefully, by successful completion of the work, you would have a publishable work, and we can discuss at the end of the semester if we can compile and publish the work.

Announcement

No class on 17th March 2020

Schedule

Lectures: Tuesday 5:00-7:30pm ECE 632
Office Hour: Tuesday 2:00-5:00pm ECE 222
Midterm presentation - 7/4/2020
Final presentation - 2/6/2020, 9/6/2020
Final report due - 2/6/2020

Course Outline

(depending on the interest of the class the outline will be modified during the semester. Students are encouraged to suggest topics of interest during the semester.)

Nanosystems and Devices: Introduction- nanomaterials, nanodevices, nanostructures.
Nanoscale Lithography: X-ray, Electron-Beam and Ion-Beam; Soft Lithography; Scanning Probe Lithography.
Advances in Device Technology: nanoscale silicon devices, process technology, present challenges.
Self-Assembled Nanocrystals: self-assembly, surface defects and passivation, structures, energy levels, transitions, luminescence and lasing.
Nano Electro Mechanical Systems (NEMS): stress in thin films, mechanical to electrical transduction, surface engineering techniques, process flow, NEMS actuators, high aspect ratio system technology.
Nano Biotechnology: scope and dimensions; detection of biological species on electrical, mechanical and optical criteria; Bio functionality on silicon; Biochip sensors and systems- structures, process technology.
Nanophotonic systems
Miscelleneous topics of interest

Tentative topics on Final Presentation

Nanophotonic systems
Nanobiotechnology
NEMS
Nano energy harvesting
Metasurface
Biomimicry in nanotechnology
Emerging nano manufacturing technology
Self assembled nano-crystals
Fabrication of Neuromorphic Computers

Scope of write up (including but not limited to):

Broad introduction of the field
Present Challenges
Fabrication methods
Breakthrough publiactions
Significant applications

Instruction:

You need to form groups of 3 students. Each group will work on a particular scope. I will circulate a google form where you can give choice regarding the topics. Each group’s broad topic should be unique.

To improve writing skill, I highly recommend the Kristin Sainani’s course from Stanford University, . Complete week 1-5 of the course to improve your writing style.

If you choose to do so, I am willing to work on the final paper further with the possibility of publishing it in a peer-reviewed journal.

Lecture Plan (will update as the semester progresses)

- 25/2/2020 - Introduction to Nanotechnology and Nano Systems

EEE Courses before Fall 2013

Tue, 01 Oct 2013 00:00:00 +0000

Courses I taught before Fall 2013

Files hosted in box.com

IICT 5101 - Programming Concepts (Fall 2009)

Thu, 01 Oct 2009 00:00:00 +0000

Course Outline

This course introduces students to programming and logic flow, procedural versus object oriented programming, data types, variables, constants, operators, expressions, input-output, control structures, arrays, functions, pointers, file access, structures, dynamic memory allocation, classes, objects, constructor and destructor, inheritance, polymorphism, files, exception handling, etc. The course prepares students to solve basic programming problems. The course includes continuous assessment in the form of assignments, class test, and examinations.